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Positioning of "logo" and "navbar" inside header
Your ul had margin and padding :) Working Fiddle header ul{ float:right; padding: 0; margin: 0; } header ul li{ display: inline; float:left; } header a{ color:white; background:rgba(0,0,0,0.1); display:inline-block; padding:0px 25px; height:60px; line-height:60px; text-align:center; font-family: 'Roboto Slab', serif; text-decoration:none; text-transform:uppercase; letter-spacing:2px; font-weight:700; } I also changed the left and right padding on the header a for the sake of the fiddle.

Categories : HTML

intel kernel builder, failed to create context for intel opencl cpu device
According to this Site, Intels OpenCL SDK does not support Core2 Duo/Quad CPUs (because they do not support SSe 4.2): http://software.intel.com/en-us/articles/intel-sdk-for-opencl-applications-2013-release-notes#_System_Requirements_1 So the compiler cannot create the context for this device. You may be able to work around this by explicitly choosing the target architecture in the Option Dialog. I'm not sure this will work and the code will certainly not run. If you want to use OpenCL on you machine, try the AMD APP SDK, which supports every x86 with at least SSE2: http://developer.amd.com/tools/heterogeneous-computing/amd-accelerated-parallel-processing-app-sdk/ That, however, will not work with Intel's KernelBuilder.

Categories : Windows

Split ul in half and wrap those 2 parts around a div (logo inside dynamic menu)
$(function(){ var liCount = $('#top-menu>li').length / 2 -1; $('#top-menu>li').eq(Math.floor(liCount)).append("<li><div id='logo'><a href='#'><h1>Logo</h1></a></div></li>"); }); So what I did here is count the number of li inside of #top-menu, subtracted one because eq is zero based. Then appended #logo inside of a new li and place it right after the middle of your li's. It will look better if you have an even number of li's

Categories : Jquery

Why is scanf stuck inside a while loop?
The in your scanf format is interpreted as "any amount of whitespace". It keeps reading whitespace (spaces, tabs, or carriage returns) until it hits something that isn't whitespace.

Categories : C

Responsive Logo - Menu Overlaps Logo
You can't use fixed dimensions AND get the responsive, resizing qualities you are looking for. Furthermore, you shouldn't use a background image if you want it resizing. To fix you code, it is simple. Add the background image as a html image inside of your <div class="rt-block logo-block"> <a href="/~thanos/example/" id="rt-logo"> <img src="http://174.142.32.91/~thanos/example/images/example.png" /> // This is your image </a> </div> Next, remove the following from your css: #rt-logo{background:url("../images/logo/logo1.png") no-repeat;} #rt-logo{margin:-9px 0 0 0;width:172px;height:84px;display:block;}

Categories : CSS

Wait for a logo to load, fade in the logo, fade out after delay then fade in rest of site
Cool thing about jQuery is it lets you chain functions together, and some functions (luckily in your case "FadeIn/Out" come with a callback function)! $(document).ready(function () { // simplest solution $('img').hide(0).delay(3000).fadeIn(333, function () { $(this).fadeOut(333, function () { $('#content').fadeIn(333); }); }); }); http://jsfiddle.net/whiteb0x/JRtGS/

Categories : Jquery

intel x86 - why does -4(%ebp) refers to nothing?
On the x86 ebp is typically used as the frame pointer and esp is the stack pointer. Around the frame pointer the frame pointer of the caller and the return address are saved. That could explain the gap. In my assembly actually -4(%ebp) is used, so maybe we are looking at a different ABI, but there should always be a gap for the stack administration. About the -20 subtracted from the stack pointer and still access -24(%ebp): there is probably a push after the movl %esp, %ebp in your assembly, which would account for an additional 4 bytes.

Categories : C

error with using intel aes API
-lname is an abbreviation for libname.a (or other library suffixes, such as libname.dylib). To use a library file that does not begin with lib, simply specify a path to it, the same as you would do with a source file or object file. (In this case, you do not need the -L either, as that specifies paths to be searched when -l is used.) So you could use this command: gcc -I/home/xxx/Documents/Intel_AESNI_Sample_Library_v1.2/intel_aes_lib/include intel_aes.c /home/xxx/Documents/Intel_AESNI_Sample_Library_v1.2/intel_aes_lib/lib/x64/intel_aes64.a

Categories : C

Intel 8086, a few little things
MOV AL,4 is encoded to B004. MOV AX, DS:5678h is an invalid combination of opcode and operands. This will not compile. SUB BX, [DI+6] is encoded to 2B5D06. For those interested, this is how to decode compiled 16-bit assembler. ... this may be a good wiki. Firstly: This was done on Mac OS X, but any Linux distribution can use the tools described. In x86 (8086) assembler language, as well as many other assembly languages, the assembler compiles (barely) human-readable mnemonics to bytecode. Each mnemonic converts to a specific bytecode. For example: XOR AX, AX encodes to 31C0. To decode machine-language, you will need your favorite text editor, NASM (Netwide Assembler), and a hex editor. Step 1: Enter your mnemonic to decode in your text editor, with the [BITS 16] instruction firs

Categories : Assembly

GCD Iteratively in x86 intel Assembly
I bet remainder is set to 0 before you reach the first iteration of calculation_loop, and that's why it's jumping out of calculation_loop immediately. That's your problem, but what about a solution? You should order your code differently, so it functions like a do-while instead of a while loop. I reordered your instructions, so that the code functions like a do-while loop: ; calculation loop calculation_loop: ; set b to a mov ecx, intA mov intB, ecx ; set a to r mov ecx, remainder mov intA, ecx ; clear remainder (I don't think this is nessesary, can't say for sure) mov edx, 0 ;process remainder and store in variable mov ecx, intA div ecx mov remainder, edx ; write data mov eax, remainder call WriteInt

Categories : Assembly

AT&T to Intel assembly converter
There's a not-quite-complete Perl script here that might help you out if you're up for making some modifications/extensions to anything missing: http://boinc.berkeley.edu/android-boinc/libssl/crypto/perlasm/x86_64-xlate.pl If not, just run Att2Intl in DOSBox or a WinXP VM. If you don't have access to XP, you could also try installing ReactOS in a VM. I believe they used DOSBox source to implement the DOS layer so that may provide a long-term solution without having to resort to actually running DOSBox every time.

Categories : Assembly

Java development using INTEL SDK
There is a java tutorial out on the Perceptual Computing Download Site. This tutorial is in the SDK Documentation - look under "SDK Tutorials" and "My First Java Application" You will need to install JDK 1.7.0_11 or later. Set the environment variable JAVA_HOME to point to the installation directory for easy reference. 1.Create a directory called Java1. 2.Launch any editor and enter the Java code Java1.java. import intel.pcsdk.*; import java.lang.System.*; public class Java1 { public static void main(String s[]) { PXCUPipeline pp=new PXCUPipeline(); if (!pp.Init(PXCUPipeline.GESTURE)) { System.out.print("Failed to initialize PXCUPipeline "); System.exit(3); } for (;;) { if (!pp.AcquireFrame(true)) break; PXCMGesture.GeoNode[] nodes=new PXCMGest

Categories : Java

Hyperthreading intel processors and C
On suggestion of @us2012 I post this here from my comment... There is no such magic. Superscalar CPUs, especially OOO (Out Of Order execution) processors do magic - but that is inside one core. On the contrary, Hyperthreading can be thought of as (very simplified) two pipelines in front of one complete core. AMD Bulldozer CPUs have a similar bit, but they went a step further: the integer core is split into two too, but the two pipelines + integer cores share one floating point unit. This whole is called a "module", having two threads. TL;DR Superscalar (from the Wiki) A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor. It therefore allows faster CPU throughput than would otherwise be possible at a given c

Categories : C

Intel TBB it's 2 time slower than std - tbb vs std
You are sharing the random number generator (RNG) for all the workers that ITBB will control, which, as I see from your question, will be four. Leaving aside the issue of thread safety of mutating the state of the RNG from multiple threads, I would point to the effect on cache: the same memory used by the RNG state is accessed for both reading and writing from four processors, something that most likely renders useless the cache. Let's try this: #include <tbb/concurrent_vector.h> #include <tbb/parallel_for_each.h> #include <vector> #include <functional> #include <random> #include <iostream> #include "config.hpp" static thread_local std::mt19937 mt; static thread_local std::uniform_int_distribution<u_int32_t> dist(0, 499); int main() { std

Categories : C++

Intel instruction set: multiply with EAX, EBX, ECX or EDX?
The instruction set is simply defined that way. Intel could have defined it in other ways, including ways that would have allowed you to completely specify input and output registers, but they did not. The excuse is arguably that at the time the various multiply instructions were added to the instruction set of the CPU (8086 vintage, I think), that the existing instruction didn't have any obvious places to put multiply where it could share the general decoding scheme available to other instructions (e.g., mov, add, xor, etc), that there were not a lot of available transistors to do fancy decoding schemes to enable some other way to encode general operands, and that any transistors that were available were better dedicated to the multiplication/division logic. Finally, the multiply instr

Categories : Assembly

Intel x86 to ARM assembly conversion
Answer to Question 1 The MOV instruction on ARM only has 12 bits available for an immediate value, and those bits are used this way: 8 bits for value, and 4 bits to specify the number of rotations to the right (the number of rotations is multiplied by 2, to increase the range). This means that only a limited number of values can be used with that instruction. They are: 0-255 256, 260, 264,..., 1020 1024, 1040, 1056, ..., 4080 etc And so on. You are getting that error because your constant can't be created using the 8 bits + rotations. You can load that value onto the register following instruction: LDR r0, =0x0804c000 Notice that this is a pseudo-instruction though. The assembler will basically put that constant somewhere in your code and load it as a memory location with some of

Categories : C

Logo with a link
Like this remove div tag and add class on a tag HTML <a href="home.html" class="logo" > <img src="images/logo/logo.jpg"> </a> DEMO

Categories : HTML

Display Logo and Nav on same bar CSS
you can either float the <ul> and the <img> to the left, or set them both to display:inline-block http://jsfiddle.net/HqWwL/

Categories : CSS

Need some help on my navigation bar and logo
Seeing as you aren't linking to anywhere with the logo image you could set it as the UL background-image with "no-repeat top center"; scrap the logo div and img. then increase the margin-right on the about link to half of the width of the logo and margin left on the gallery link to half the width of the logo. You might have to play with the padding on the UL too.

Categories : HTML

how to add logo to qr codes
You will have to add an image overlay perhaps using another image library. I managed to find this resource that was able to do it. http://skrymerdev.wordpress.com/2012/09/22/qr-code-generation-with-zxing/ However I am certain you cannot add an image directly in the center of an QR code it will not allow the QR code to scan. You may be able to put a small one at the top.

Categories : Java

Why is the logo hiding in IE7?
I can't really explain why, but z-index in IE7 and IE8 acts weird. If you're using z-index, and want it to work in older IE browsers, you need to make sure your parent element has an heigher z-index then your element. For example, give your #header a z-index: 6000; and it'll be fixed. I hope someone can give you an better explanation as to why this works, as I would like to know aswell myself. EDIT: I've googled abit and found this interesting post: http://www.brenelz.com/blog/squish-the-internet-explorer-z-index-bug/

Categories : CSS

How to get my logo to center?
Try moving class="logo_sidebar" to the containing link tag <a href="#/" class="logo_sidebar"><img src="img/kobe_logo.png"></a> and replacing .logo_sidebar in your css file with this: .logo_sidebar {text-align:center; display:block;} .logo_sidebar img {margin:2.3em 0 2em; }

Categories : Twitter

What is the macro testing AVX-2 arch for Intel CPU?
According to this thread Generate list of preprocessor macros defined by the compiler the same -dM works for icc.

Categories : C++

How do I change the splash screen in the Intel XDK?
when you are building the app for ios/android..., you can select splash screen and icons for your app, upload there and build. http://appcenter.html5tools-software.intel.com/

Categories : HTML

Running mono/c# on intel phi coprocessor
It is entirely possible to run mono on Phi due to the fact that it is just running a standard Linux kernel. Any specific shared libraries you need would also have to be compiled for mic and copied to the card as well.

Categories : C#

PMU Cache Events on Intel i7 (Ivy Bridge)
Use perf list to get a list of the supported events and their perf names. You'll see events like L1-dcache-loads and LLC-load-misses that you can use. FYI, it usually takes a while for a new microarchitecture to make it into perf in the kernel, and another while for that kernel version to make it into distributions, so it might happen that your kernel isn't Ivy Bridge aware if you're using, say, the default kernel with Ubuntu 12.04 LTS.

Categories : Linux

Intel c++ compiler, ICC, seems to ingnore SSE/AVX seetings
Two points: (1) It appears you are using intel intrinsics in your code -- g++ and icpc do not necessarily implement the same intrinsics (but most of them overlap). Check the header files that need to be imported (g++ may need the hint to define the inartistic for you). Does g++ give an error message when it fails? (2) The compiler flags do does not mean that instructions will be generated (from icpc --help): -msse3 May generate Intel(R) SSE3, SSE2, and SSE instructions These flags are usually just hints to the compiler. You may want to look at -xHost and -fast. It seems no matter what options I try it compiles but does not make optimal use of the AVX code. How have you checked this? You may not see a 4x speedup if there are other bottlenecks (such as memory bandwidth). EDIT (

Categories : C++

Is it possible to use std::thread to parallelize on Intel Xeon Phi?
The answer is yes, please see http://software.intel.com/en-us/articles/choosing-the-right-threading-framework

Categories : C++

Android AVD 2.3.3 w/ Google APIs on Intel Vs ARM
The use of the Intel x86 emulator images is covered in the documentation. Can I do so on all dev systems? (e.g. Linux, OSX, ...) The system requirements for the use of the Intel x86 emulator images is covered in the documentation. While all Android SDK development platforms are supported, not all CPUs are, and the "step-by-step" instructions vary by OS. UPDATE My apologies regarding the Google APIs. There is no support for Google APIs on all the x86 variants, as Intel has not prepared them. At this point, it is exceedingly unlikely that there will ever be an x86 image with Google API support.

Categories : Android

Intel's IPP to create images from arrays
One way would be to just write it out as space delimited numbers in a file.raw, and load it with ImageJ. ImageJ will give you an option to specify width, height and bit-depth. Second, one I have dome in the past, is (if you use Matlab too), use matlab engine commands to figure(data), and then used getframe/get(gcf) etc. to imwrite it to your fav. image format (Matlab has tons of them)

Categories : Arrays

Does Intel IPP 8.0 support in-place operations?
Here's a quote from Intel's comment on the deprecated functions: In-place functionality will be removed: In-place functions accept only one pointer for input and output. The out-of-place versions often offer the same functionality but with the additional flexibility of specifying a different output buffer. In my experience, all out-of-place functions with deprecated in-place variants support in-place operation, pSrc and pDst may point to the same memory. Therefore my answer is: Yes, IPP 8.0 still supports in-place operations, but it's not documented well.

Categories : Misc

OpenCL SDK Linux Download for INTEL GPU
No, there isn't for the GPU. And according to this thread (http://software.intel.com/en-us/forums/topic/402118) Intel won't tell us if or when they will release such a thing. The Intel OpenCL SDK only works with CPUs and the Xeon Phi right now. And for CPU, you may want to try out the AMD SDK even for Intel CPUs. I'm running a benchmark right now and is seems to be faster. Also has better support of free tools (CodeXL).

Categories : Linux

Can't use printf or debugger in Intel SDK for OpenCL
THe function printf() was introduced in the OCL version 1.2. Intel released this version not that long time ago. I'd bet that you still have the 1.1 version. Regarding the debugger I almost never used it but based on this document the path is supposed to be given like that: "-g -s "C:\Path\to\my\program.cl"" You are also supposed to choose which thread you wanna debug.

Categories : Visual Studio

CUDA 5.5 & Intel C/C++ Compiler on Linux
Referring to the file referenced in the error you received, it's specifically looking for an ICC compiler with a particular build date: #if defined(__ICC) #if !(__INTEL_COMPILER == 9999 && __INTEL_COMPILER_BUILD_DATE == 20110811) || !defined(__GNUC__) || !defined(__LP64__) #error -- unsupported ICC configuration! Only ICC 12.1 on Linux x86_64 is supported! #endif The solution would be to have the intel compiler that actually matches that specified build date. As indicated, ICC 12.1, ie. version 12.1.0.233, instead of ICC 12.1.5 should do the trick. The narrow focus is at least partly due to a test limitation. In this case, a particular ICC variant was tested with the CUDA toolkit before it was released, and so that host config check has this test in it.

Categories : Linux

Intel IA32 cheat sheet
The Intel and AMD manuals are probably the best resources for this. You obviously don't need to read ALL of it, but the relevant sections - for example AMD's "AMD64 Architecture Programmers Manual, Volume 2", where chapter 5 covers "page translation", which is the basis for virtual memory. Edit: Declaring bias: I have worked for AMD and I still prefer AMD to Intel - both when it comes to the literature and the actual product. Task switching is typically done by simply saving the context of one process and restoring the new process's context using, mainly, regular instructions, with a couple of moves to CR3 and CR4 for setting up the page-table for the new process (usually don't have to save the CR3/CR4 values, since they are "fixed" per process, so you just load the new ones from whatev

Categories : C++

Whats is equivalent of REP stosl in intel x86
I believe it is rep stosd For repeated store string DWORD (32 bits). You can find the stos_ instructions in the Intel instruction set reference. They use the suffixes b for 1-byte, w for 2-byte, and d for 4-byte string operations.

Categories : Assembly

Sencha touch 2.2.1 logo on top
Could it be this? android:theme="@android:style/Theme.NoTitleBar" See this question in the sencha forum. There is a similar option if you are packaging it with PhoneGap, your need to set that in the manifest.xml. See this. Good luck, Brad

Categories : Extjs

Error when i try my Logo Quiz like app
Your if statements are wrong. In the onClick method you use only '=' instead of '=='. The equals sign assigns true to the value of mb and then the if is evaluated. This means that the value of mb is always set to true and thus every answer is evaluated as correct. You should check like this: if (mb == true) { ... } or better yet if (mb) { ... } The same goes for checking false. You could use: if (mb == false) { ... } or if (!mb) { ... }

Categories : Android

Redirecting a WSH script without logo
cscript /? Usage: CScript scriptname.extension [option...] [arguments...] Options: //B Batch mode: Suppresses script errors and prompts from displaying //D Enable Active Debugging //E:engine Use engine for executing script //H:CScript Changes the default script host to CScript.exe //H:WScript Changes the default script host to WScript.exe (default) //I Interactive mode (default, opposite of //B) //Job:xxxx Execute a WSF job //Logo Display logo (default) //Nologo Prevent logo display: No banner will be shown at execution time //S Save current command line options for this user //T:nn Time out in seconds: Maximum time a script is permitted to run //X Execute script in debugger //U Use Unicode for redirected I/O fro

Categories : Misc

Cant seem to align logo with navbar
If you were to restructure your HTML, moving your 'ul' into the header, it's very easy. <header> <div id="logo"> <img src="logo.JPG" style="float: left; " alt="logo" name="logo" width="571" height="176" id="logo"> </div> <div id="menu"> <ul> <li><a id="nav-index" class="first" href="%E2%80%9D#%E2%80%9D">Home</a></li> <li><a id="nav-aboutus" href="%E2%80%9D#%E2%80%9D">About Us</a></li> <li><a id="nav-ourservices" href="%E2%80%9D#%E2%80%9D">Our Services</a></li> <li><a id="nav-environment" href="%E2%80%9D#%E2%80%9D">Environment</a></li> <li><a id="nav-latestnews"

Categories : CSS



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